lcapy.oneport

This module supports simple linear one-port networks based on the following ideal components:

V - independent voltage source
I - independent current source
R - resistor
C - capacitor
L - inductor

These components are converted to s-domain models so capacitor and inductor components can be specified with initial voltage and currents, respectively, to model transient responses.

One-ports can either be connected in series (+) or parallel (|) to create a new one-port.

Copyright 2014–2024 Michael Hayes, UCECE

Functions

ladder(*args, **kwargs)

Create a ladder oneport network with alternating series and shunt components.

parallel(*args)

Create a parallel combination of a number of components.

series(*args)

Create a series combination of a number of components.

Classes

C([Cval, v0])

Defines a simple linear one-port capacitor.

CCCS(control, value, **kwargs)

CCVS(control, value, **kwargs)

CPE(K[, alpha])

Constant phase element

ControlledSource()

These components are controlled one-ports.

CurrentSourceBase()

Damper([Gval])

Friction coeff val

Dummy(*args, **kwargs)

FerriteBead(Rs, Rp, Cp, Lp, **kwargs)

Ferrite bead (lossy inductor)

G([Gval])

Conductor

I([Ival])

Arbitrary current source

Iac(Ival[, phi, omega])

AC current source.

Idc(Ival, **kwargs)

DC current source (note a DC current source of current i has an s domain current of i / s).

Inoise(Ival[, nid])

Noise current source.

Istep(Ival, **kwargs)

Step current source (s domain current of i / s).

K(L1, L2, K, **kwargs)

Coupling coefficient

L([Lval, i0])

Inductor

LoadCircuit(source_OP, load_OP)

Circuit comprised of a load oneport connected in parallel with a source oneport.

Mass([Cval, v0])

Mass mval, initial velocity v0

NG([Gval])

Noiseless conductor

NR([Rval])

Noiseless resistor

O(**kwargs)

Open circuit

OnePort()

One-port network

P(**kwargs)

Port (open circuit)

Par(*args)

Defines a pair or more of one-port networks in parallel.

ParSer()

Parallel/serial class

R([Rval])

Defines a simple linear one-port resistor

Ser(*args)

Defines a pair or more of one-port networks in series.

Spring([kval, f0])

Spring constant kval, initial force f0

V([Vval])

Arbitrary voltage source \(V\)

VCCS(value, **kwargs)

VCVS(value[, Ac])

Vac(V[, phi, omega])

AC voltage source.

Vdc(Vval, **kwargs)

DC voltage source

Vnoise(V[, nid])

Noise voltage source.

VoltageSourceBase()

Vstep(v, **kwargs)

Step voltage source (s domain voltage of v / s).

W(**kwargs)

Wire (short)

Xtal(C0, R1, L1, C1, **kwargs)

Crystal

Y([Yval])

General admittance \(Y\)

Z([Zval])

General impedance \(Z\)

i(Ival, **kwargs)

Arbitrary t-domain current source

sI(Ival, **kwargs)

Arbitrary s-domain current source

sV(Vval, **kwargs)

Arbitrary s-domain voltage source

v(vval, **kwargs)

Arbitrary t-domain voltage source